The present invention relates to the field of printed circuit boards; more specifically, it relates to electronic devices connection pads and mechanical connectors for printed circuit boards and the method of fabricating the pads and connectors.
Printed circuit boards (PCB""s) serve the purpose of an intermediate level of packaging for attachment and electrical inter-connection of discrete devices such as resistors and capacitors and active devices such as logic and memory modules. Printed circuit board may also have edge connectors for physical attachment and electrical connection of the printed circuit board to a higher level of packaging. Devices are attached to printed circuit boards by a variety of methods. One attachment method is soldering to pads of discrete passive surface mount technology (SMT) components or active device ball grid array (BGA) or land grid array (LGA) modules. Another attachment method is pin in hole (PIH) soldering. PIH soldering requires printed circuit having plated through holes (PTH""s). The pads and edge connectors are interconnected by wiring traces formed on the top surface of the printed circuit board. Often wiring traces are formed on the bottom surface of the board and within the board itself. Similarly, devices may be mounted on both the top and bottom surfaces of the printed circuit board.
Pads for SMT, BGA, LGA, and PIH/LGA solder connections require surface finish layers that provide good solderability and corrosion resistance. Edge connectors require surface finish layers for good electrical and mechanical contact, wear resistance, and corrosion resistance. Wiring traces must be protected from solder operations, often by a solder mask. The solder mask must have good adhesion to the wiring trace, requiring a application of a surface finish or surface treatment of the wiring trace.
Generally it is not possible for one surface finish to satisfy all the requirements thus placed on the printed circuit board so multiple surface finishes and/or surface treatments are required. Often multiple finishes require multiple masking steps. When multiple surface finishes or treatments are applied to a printed circuit board compatibility of the processes employed to produce those finishes is critical. For example, the chemicals used to remove masks should not corrode or contaminate any prior formed surface finishes. Similarly, the processes used to form a given surface finish should not corrode or contaminate other surface finishes or printed circuit board features.
A first aspect of the present invention is a method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate. The method includes: forming an oxide layer on the set of second copper conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a lead-tin layer on at least a portion of the third set of conductors.
A second aspect of the present invention is a method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate. The method includes: forming an oxide layer on the first, second and third sets of second conductors; forming a solder mask over the oxide layer on the second set of conductors; removing the oxide layer from the first and third sets of conductors; forming a first masking layer over the second and third sets of conductors; forming a composite layer on the first set of conductors; removing the first masking layer; forming a second masking layer over the first and second sets of copper conductors; and forming a solder layer on at least a portion of the third set of conductors.
A third aspect of the present invention is a printed circuit device including an electrically insulating substrate; first, second, and third sets of conductors formed on a top surface of the substrate; an oxide layer on the set of second conductors; a solder mask on the oxide layer; a composite layer on the first set of conductors; and a solder layer on at least a portion of the third set of conductors.
A fourth aspect of the present invention is a method of improving the adhesion of a protective layer over a conductive circuit feature during fabrication of a printed circuit device comprising: providing a substrate with conductive circuit features thereon; forming an oxide layer over at least a portion of the conductive circuit features, the oxide layer providing enhanced adhesion for a protective layer; applying the protective layer over the oxide layer over at least a portion of the conductive features; selectively removing portions of the protective layer to expose select regions of the oxide layer over the at least a portion of the conductive circuit features; removing the oxide layer in the exposed regions; and electroless plating a first conductive layer in the select regions of exposed the oxide layer.